Browsing by Author "Hammachi, Radhouane"

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    ECG beats classification with interpretability
    (IEEE, 2022) Hammachi, Radhouane; Messaoudi, Noureddine; Belkacem, Samia
    Recently, a lot of emphasis has been placed on Artificial Intelligence (AI) and Machine Learning (ML) algorithms in medicine and the healthcare industry. Cardiovascular disease (CVD), is one of the most common causes of death globally, and Electrocardiogram (ECG) is the most widely used diagnostic tool to investigate this disease. However, the analysis of ECG signals is a very difficult process. Therefore, in this work, automated classification of ECG data into five different arrhythmia classes is proposed, based on MIT-BIH dataset. Convolutional Neural Network (CNN) and Long Short-Term Memory (LSTM) Deep Learning (DL) models were used. The black-box nature of these complex models imposes the need to explain their outcomes. Hence, both Permutation Feature Importance (PFI) with Gradient-Weighted Class Activation Maps (Grad-CAM) interpretability techniques were investigated. Using the K-Fold cross-validation method, the models achieved an accuracy of 97.1% and 98.5% for CNN and LSTM, respectively
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    FPGA-Based real time monitoring and control system for greenhouse
    (2020) Slimani, Anis; Hammachi, Radhouane; Benzekri, A. (Supervisor)
    This report describes the design and implementation of an SoPC-based real time monitoring and control system for a Greenhouse, using the Field Programmable Gate Array (FPGA), to allow manual or automatic control of the environmental parameters inside the greenhouse, in order to suit the requirements of the plants growing inside it. For this purpose, an Android application has been created to allow the user to see the status of the greenhouse, and to manually control the actuators or to enter set points for the environmental parameters in the automatic mode. The prototype of the project consists of four main parts. The on-chip hardware, where the SoPC-based system is implemented using Nios II soft processor, on-chip memory, I/O peripherals and custom VHDL blocks. The off-chip hardware including actuators, driving units and data acquisition unit. The smartphone for the android application and a PC. The model was synthesized using Quartus II and targeted at Cyclone-II FPGA, the EP2C35.