Simulation of a GPS clock synchronization using phase locked loop

dc.contributor.authorTouhami, Abdlaziz Abdlaziz
dc.contributor.authorAbdallahoui, Said
dc.contributor.authorOuadi, Abderrahmane (supervisor
dc.date.accessioned2023-06-06T08:33:17Z
dc.date.available2023-06-06T08:33:17Z
dc.date.issued2020
dc.description68 p.en_US
dc.description.abstractIn this work, a four (4) elements linear microstrip patch antenna with a reduced mutual coupling degree to operate at the 2.45 GHz resonance frequency has been presented. Initially a single rectangular patch has been simulated using the CST MICROWAVE STUDIO printed on a FR4 dielectric material to resonate at 2.45 GHz with a reflection coefficient of -55 dB. Then, the work is extended to a patch with a parasitic element coupled in the radiating edge of the pilot. The reduction of the mutual coupling is carried out by first spacing the patches; but the structure occupies more space. After that, curvatures and slots method is applied to reduce the occupied space. It is noted that the mutual coupling is amply reduced. To quantify the mutual coupling reduction, the curvatures and slots method is further applied 4 elements linear antenna array. For purpose of comparison, the normal 4 elements linear antenna array is studied. The obtained results show that the mutual coupling has acceptable levels that is sufficient to maintain the array characteristics insensible to this effect.en_US
dc.description.sponsorshipUniversité M'hamad Bougara Boumerdès : Institut Génie Electrique et Electroniqueen_US
dc.identifier.urihttps://dspace.univ-boumerdes.dz/handle/123456789/11703
dc.language.isoenen_US
dc.subjectPhase Locked Loop (PLL)en_US
dc.subjectGlobal posisioning system (GPS)en_US
dc.titleSimulation of a GPS clock synchronization using phase locked loopen_US
dc.typeThesisen_US

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