Contribution to the NBTI effect study in MOS devices

Abstract

This thesis delves into the Negative Bias Temperature Instability (NBTI) effect in Metal-OxideSemiconductor (MOS) devices, specifically Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). The study comprehensively examines challenges posed by NBTI in the gate dielectric, impacting device parameters like threshold voltage. The research focuses on empirical work and advanced characterization techniques. This work highlights the significance of MOSFETs in electronic device development and emphasizes the imperative need for fast measurement techniques to accurately characterize NBTI. An overview explores MOS devices and NBTI, introducing technologies such as silicon oxy-nitride ( ) and high-K (HK) insulators. The exploration encompasses various NBTI models, delving into the response of classical and advanced MOS devices to NBTI. Also, the research unfolds in the experimental setup within the Characterization room with the Semiconductor Device Reliability team, outlining devices, technologies, instruments, software, and heating systems instrumental in the measurements. It introduces the fast pulsed currentvoltage

(FPIV) technique using the OPA818 amplifier and the separated single pulse charge pumping (SSPCP) technique. Plus, it discusses experimental results gleaned through the implemented techniques, scrutinizing NBTI in MOSFETs with varying oxide thicknesses. It explores the enhanced FPIV technique and introduces the newly devised SSPCP technique, providing a nuanced perspective on interface traps along the MOSFET channel