FPGA-Based phasor measurement unit prototype

Abstract

This report describes the design and implementation of an SoPC-based Pha-sor Measurement unit which is required in electronic applications where a syn-chronous relationship between the signals needs to be preserved, using the Field Programmable Gate Array (FPGA). However, due to the constraints imposed by the covid19 health crisis, the project only covered the evaluation usage of the FFT core using an analogue input from a potentiometer. This signal is sampled using the Analog to Digital Converters(ADC) on the FPGA board. The design then stores digital data into a local FIFO, which is passed to a 1024-Point FFT hardware core to get the spectrum of the signal and hence calculate the main frequency. The sys-tem uses the Intel DE10 FPGA board (donated by the Intel University Program) and the Quartus Prime suite to design and implement the system and the model was synthesized using Quartus II and targeted at Cyclone-V FPGA. The design was successfully implemented.