A real time implementation on FPGA of a clutter map CFAR detector

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dc.contributor.authorMansouri, Houria
dc.contributor.authorHamadouche, M'Hamed
dc.contributor.authorYoucef Ettoumi, Fatiha
dc.date.accessioned2015-06-11T13:56:27Z
dc.date.available2015-06-11T13:56:27Z
dc.date.issued2011
dc.identifier.citationInternational Radar Symposium, IRS 2011 - Proceedings 2011, Article number 6042119, Pages 207-211en_US
dc.identifier.isbn978-392753528-2
dc.identifier.urihttps://dspace.univ-boumerdes.dz123456789/1686
dc.relation.ispartofseriesInternational Radar Symposium, IRS 2011; Leipzig; Germany; 7 September 2011 through 9 September 2011; Category numberCFP11RAS-ART; Code 87178
dc.subjectCFAR detectoren_US
dc.subjectPerformance analysisen_US
dc.subjectRadar targeten_US
dc.subjectReal-time implementationsen_US
dc.subjectWhite Gaussian Noiseen_US
dc.subjectGaussian noise (electronic)en_US
dc.subjectRadaren_US
dc.subjectSignal detectionen_US
dc.titleA real time implementation on FPGA of a clutter map CFAR detectoren_US
dc.typeArticleen_US

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