FPGA-based real-time implementation of distributed system CA-CFAR and Clutter MAP-CFAR with noncoherent integration for radar detection

dc.contributor.author	Benseddik, Houssem Eddine
dc.contributor.author	Cherki, Brahim
dc.contributor.author	Hamadouche, M'hamed
dc.contributor.author	Khouas, Abdelhakim
dc.date.accessioned	2021-02-23T09:01:05Z
dc.date.available	2021-02-23T09:01:05Z
dc.date.issued	2012
dc.description.abstract	In this work, we propose real time implementation approaches of distributed Constant False Alarm Rate (CFAR) detection with noncoherent integration. The Cell Averaging (CA-CFAR) and Clutter MAP (CMAP-CFAR) detectors are employed as local detectors. The proposed architecture shows that it can be implemented with the advantages of a parallel structure and allows an important optimization of the required FPGA hardware resources utilization. The structure has been implemented using a Virtex-II XC2V1000-4FG456C FPGA board. The FPGA implementation results are presented and discussed	en_US
dc.identifier.other	13058246
dc.identifier.other	DOI: 10.1109/ICMCS.2012.6320178
dc.identifier.uri	https://ieeexplore.ieee.org/document/6320178
dc.identifier.uri	https://dspace.univ-boumerdes.dz/handle/123456789/6502
dc.language.iso	en	en_US
dc.publisher	IEEE	en_US
dc.relation.ispartofseries	2012 International Conference on Multimedia Computing and Systems;
dc.subject	FPGA-based	en_US
dc.subject	MAP-CFAR	en_US
dc.title	FPGA-based real-time implementation of distributed system CA-CFAR and Clutter MAP-CFAR with noncoherent integration for radar detection	en_US
dc.type	Article	en_US

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