A perfectly symmetrical configuration in dual-bridge inverter topology for maximum mitigation of emi, common-mode voltages and common-mode currents

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dc.contributor.authorAkroum, Hamza
dc.contributor.authorKidouche, M.
dc.contributor.authorGrouni, S.
dc.contributor.authorZelmat, M.
dc.date.accessioned2015-04-22T14:34:16Z
dc.date.available2015-04-22T14:34:16Z
dc.date.issued2010
dc.identifier.issn1392 – 1215
dc.identifier.urihttps://dspace.univ-boumerdes.dz/jspui/handle/123456789/514
dc.language.isoenen_US
dc.relation.ispartofseriesElectronics and electrical engineering/N°7 (2010);pp. 51-56
dc.subjectTopologyen_US
dc.subjectCommon-Mode Voltagesen_US
dc.subjectCommon-Mode Currentsen_US
dc.subjectDual-Bridge Inverteren_US
dc.titleA perfectly symmetrical configuration in dual-bridge inverter topology for maximum mitigation of emi, common-mode voltages and common-mode currentsen_US
dc.typeArticleen_US

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