Stereo vision IP design for FPGA implementation of obstacle detection system

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dc.contributor.authorBendaoudi, Hamza
dc.contributor.authorKhouas, Abdelhakim
dc.date.accessioned2015-06-01T11:08:41Z
dc.date.available2015-06-01T11:08:41Z
dc.date.issued2013
dc.identifier.urihttps://dspace.univ-boumerdes.dz123456789/1240
dc.publisherIEEEen_US
dc.relation.ispartofseries8th International Workshop on Systems, Signal Processing and their Applications (WoSSPA);pp. 145-150
dc.subjectFPGA implementationsen_US
dc.subjectFpga-based prototypingen_US
dc.subjectHardware architectureen_US
dc.subjectObstacle detectionen_US
dc.subjectObstacle Detection Systemen_US
dc.subjectStereo Vision Algorithmsen_US
dc.titleStereo vision IP design for FPGA implementation of obstacle detection systemen_US
dc.typeArticleen_US

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