FPGA design of a real-time obstacle detection system using stereovision

Abstract

Obstacle detection using stereovision is an important issue in intelligent vehicle and robot navigation, especially for the Advanced Driver Assistance Systems. This paper presents real-time obstacle detection system designed and implemented on single Field Programmable Gate Array (FPGA). The proposed hardware architecture combines stereo vision algorithms to compute the disparity map, V-disparity image, and Hough transform for obstacle detection. Considering the particular aspect of the V-disparity image and the real-time constraint, the Hough transform is only applied to detect the obstacles corresponding lines. The proposed system was tested in indoor environment using Virtex-II FPGA based prototyping board. For 640×480 pixels images, the proposed system can treat up to 180 frames/s when running at full rate, with a minimum detection time of 5.5 ms

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obstacle detection system, FPGA design

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