FPGA-Based real-time video processing framework

Abstract

FPGAs are widely used in academic and corporate research, they are more than a good fit when it comes to real-time embedded image/video processing due to their flexibility and the parallelism they offer which is one of the needed features in image processing algo-rithms. The aim of this project is to build a framework for real-time embedded image/video pro-cessing on FPGAs for academic research in our institute. This report presents a background in image processing and the hardware platform used and discusses the parts of the accomplished work. In this part of the project, we designed and implemented hardware modules in Verilog HDL that perform low level image processing operations and image data acquisition. These mod-ules are an intensity calculator, a Sobel filter, a Laplacian filter, a gradient calculator, a mean filter, and a scalable 3-line buffer. An SRAM frame buffer was also designed and implemented where a single frame is saved for later retrieval. These modules were implemented and tested on an Altera DE2 board. The images were captured by a Sony DSC-W120 digital camera (an off-the-shelf camera) and streamed to the board in NTSC video format.