Hardware design and FPGA implementation for road plane extraction based on V-disparity approach

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dc.contributor.authorBenacer, I.
dc.contributor.authorHamissi, A.
dc.contributor.authorKhouas, Abdelhakim
dc.date.accessioned2015-11-15T11:46:08Z
dc.date.available2015-11-15T11:46:08Z
dc.date.issued2015
dc.identifier.issn02714310
dc.identifier.urihttps://dspace.univ-boumerdes.dz/handle/123456789/2431
dc.language.isoenen_US
dc.publisherIEEEen_US
dc.relation.ispartofseriesProceedings - IEEE International Symposium on Circuits and Systems/ Vol.2015;pp. 2053-2056
dc.subjectFree space estimationen_US
dc.subjectRoad plane extractionen_US
dc.subjectStereovisionen_US
dc.subjectV-disparity mapen_US
dc.subjectExtractionen_US
dc.subjectField programmable gate arrays (FPGA)en_US
dc.subjectHardwareen_US
dc.subjectIntegrated circuit designen_US
dc.subjectMobile robotsen_US
dc.subjectPixelsen_US
dc.subjectRoads and streetsen_US
dc.subjectRobotsen_US
dc.subjectStereo image processingen_US
dc.subjectStereo visionen_US
dc.subjectStormsen_US
dc.subjectTransportationen_US
dc.subjectTransportationen_US
dc.subjectFpga-based prototypingen_US
dc.subjectHardware architectureen_US
dc.subjectObstacles detectionen_US
dc.subjectParallel processingen_US
dc.titleHardware design and FPGA implementation for road plane extraction based on V-disparity approachen_US
dc.typeOtheren_US

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