Implementation of IP cores dedicated to cryptography

Abstract

This work consists to implement IP cores dedicated to cryptography, using an FPGA as a hardware working platform and VHDL as a hardware description language. The cryptography can be classified into two main parts. Secret key and public key encryption. The last one is more complicated because it uses hard arithmetic; the RSA (Rivest, Shamir, and Adleman), DH (Diffie-Hellman Key Agreement) and the elliptic curve algorithm (ECC) are the most used public key protocols in cryptography. The modular exponentiation is the core operation in these protocols. The security of these systems depends directly on the key bit lenght, in practice (between 160 and 1024 bits or more in some applications). A high bit length and complicated operations as the modular arithmetic make the hardware solution better in different applications. The modular exponentiation can be done by successive operations of modular multiplication, that is why we chose modular multiplication as a problematic in this report. Montgomery and the interleaved are the most modular product algorithms appropriate to hardware design. In our case; we chose an optimized version of Montgomery